From 02f089af727098379798da88d287072c3a8c433a Mon Sep 17 00:00:00 2001
From: fengbh <1953356163@qq.com>
Date: Fri, 6 Dec 2024 13:53:45 +0800
Subject: [PATCH] =?UTF-8?q?=E6=9B=B4=E6=96=B0=E8=BF=9B=E5=BA=A6?=
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---
 ReadMe.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ReadMe.md b/ReadMe.md
index a2d8093..6dee8c0 100644
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -7,5 +7,5 @@ sv_lib是一系列systemverilog lab的合集，帮助学习sv的特性。
 | 项目                         | 描述                               | 状态 | 备注 |
 | ---------------------------- | ---------------------------------- | ---- | ---- |
 | [1_hierarchy](./1_hierarchy) | 对层次路径的解析测试               | 100% |      |
-| [2_vcs_comp](./2_vcs_comp)   | 使用三步编译和分块编译加快编译速度 | 80%  |      |
+| [2_vcs_comp](./2_vcs_comp)   | 使用三步编译和分块编译加快编译速度 | 100%  |      |