16 lines
529 B
Makefile
16 lines
529 B
Makefile
comp:
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- vcs -full64 +v2k -sverilog -LDFLAGS -Wl,--no-as-needed \
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-P ${VERDI_HOME}/share/PLI/VCS/LINUX64/novas.tab ${VERDI_HOME}/share/PLI/VCS/LINUX64/pli.a \
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+vcs+fsdbon -debug_access+all -ntb_opts uvm-1.2 \
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-top testbench -l compile.log -timescale=1ns/1ps\
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testbench.sv
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sim:
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- ./simv -l sim.log +fsdbfile+wave.fsdb +fsdb+no_msg+Flush +fsdb+delta +fsdb+sva_sucess +fsdb+glitch=0 +fsdb+sequential
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verdi:
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- verdi -sverilog +v2k testbench.sv -ssf wave.fsdb -sswr signal.rc &
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clean:
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- \rm -rf *.log *.fsdb simv.daidir
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