27 lines
1015 B
Systemverilog
27 lines
1015 B
Systemverilog
//===========================================================================
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// Organization : Individual Developer
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// Filename : partcfg.sv
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// Author : Feng Bohan
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// Create Time : 20:20:36 2024-12-02
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// Last Modified: 20:34:34 2024-12-02
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// Abstract :
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//--------------------------------------------------------------------------
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// Description:
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//
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//--------------------------------------------------------------------------
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// Modification History:
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//--------------------------------------------------------------------------
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// Rev Date Who Description
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// --- ---- --- -----------
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// 0.0.01 2024-12-02 Feng Bohan initial version
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//===========================================================================
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config partcfg;
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design testbench;
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default liblist WORK TB;
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partition cell counter_a;
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partition cell counter_b;
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partition cell counter_c;
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partition instance testbench.dut_top;
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partition package uvm_pkg;
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endconfig
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